This invention relates in general to semiconductor devices and their method of formation, and more particularly to semiconductor devices and methods for forming semiconductor devices having Controlled Collapse Chip Connection (C4) bumps.
Controlled Collapse Chip Connection (C4) interconnect (flip-chip bump) technology is an alternative to manual wire bonding, which involves forming solder bumps and under-bump metallurgy (UBM) structures on a semiconductor chip""s bond pads. The solder bumps are used in place of the wires to electrically connect the chip""s circuitry to external sources, for example to substrates used for chip packaging. The UBM provides important functions with respect to the C4 structure, among them include providing adhesion and barrier protection between the C4 solder bump and the semiconductor chip.
Conventional high-lead C4 solder bumps (solder bumps containing 97% lead and 3% tin) use an UBM integration that consists of sequentially forming a chromium, chromium-copper, copper, and gold layers over the bond pad and then forming the C4 solder bump on the gold layer. Subsequent heat processes are then used to reflow and form the C4 bump structure, wherein the gold layer provides oxidation protection of the underlying copper layer; the copper layer functions as the primary wetting surface for the C4 bump; the chromium-copper layer promotes inter-metal adhesion by functioning as a nucleating layer onto which copper and tin intermetallics (Cu3Sn) grow during subsequent reflow processes; and the chromium layer functions as barrier and an adhesion promoter to the underlying semiconductor chip surface.
The reflow process by which the bump is formed as well as subsequent high-temperature processes can be problematic when excess tin from the solder bump or other sources migrates to the chromium-copper layer. The excess tin at the chromium-copper layer can cause problems with respect to reliability of the C4 bump structure. Excess tin reacts with the Cu3Sn nucleating layer thereby forming a Cu6Sn5 form of the copper-tin intermetallic. The Cu6Sn5 intermetallic is undesirable because it has a tendency to spall-off the chromium-copper layer into the solder (i.e. dissolve into the bump volume). This can result in a copper deficient chromium-to-solder interface. The chromium-to-solder interface is disadvantageous because it forms a physically weak bond with the solder bump as compared to the Cu3Sn nucleating layer. Its presence can result in undesirable electrical opens with respect to the C4 bump structure.
Conventional high-lead solder C4 bump reflow processes typically do not use time and temperature combinations that cause problems with respect to formation of the Cu6Sn5 intermetallic (conventional high-lead solder melts approximately 320 degrees Celsius). However, alternative flux agents, increases in the size of semiconductor chips, increased chip complexity, and increases in the number of bumps all will likely necessitate increased reflow times and/or temperatures to insure successful and reliable bump reflow operations. The higher time and/or temperatures will result in greater quantities of tin migrating to the UBM phased-region. In addition, many alloy materials currently being investigated to replace high-lead solders have significantly higher tin concentrations than high-lead solder currently in use by the semiconductor industry. Furthermore, other sources of tin, such as cladding from the board (board-side cladding) to which the bumps and chip are attached, can also be problematic with respect to Cu6Sn5 intermetallics. When the board-side uses a relatively low melting temperature cladding or a high-tin content cladding, tin from the cladding, when in a molten state, can also attack the copper in the UBM. Therefore, with these two potential sources of excess tin, conventional UBMs will not be adequately protected against Cu6Sn5 intermetallic formation.